Switch the default clock output for single LVDS mode to odd bus only. Change-Id: I278e761566a112d95cbd6c79e09c076d70b93e8f Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> |
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| mc_apl1 | ||
| mc_bdx1 | ||
| mc_tcu3 | ||
| Kconfig | ||
| Kconfig.name | ||