coreboot/src/mainboard/siemens
Mario Scheithauer aa5e8e099e siemens/mc_apl5: Change PTN interface settings
Switch the default clock output for single LVDS mode to odd bus only.

Change-Id: I278e761566a112d95cbd6c79e09c076d70b93e8f
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2019-06-21 08:40:16 +00:00
..
mc_apl1 siemens/mc_apl5: Change PTN interface settings 2019-06-21 08:40:16 +00:00
mc_bdx1 coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
mc_tcu3 src/mainboard: Add missing 'include <types.h>' 2019-05-29 20:29:28 +00:00
Kconfig
Kconfig.name