dwc2 host core do not have a periodic schedule list, so try to send
an interrupt packet in poll_intr_queue() function and use frame
number read from usb core register to calculate time and schedule
transfers.
(Note: For cherry-picking, hfnum_t was added back into dwc2_private.h
and lines 40, 108-109, and 111 in dwc.c needed to be modified)
BUG=None
TEST=Tested on RK3288 with two USB keyboards(connect to SoC without
USB hub), both work correctly.
BRANCH=None
Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/280750
Reviewed-by: Julius Werner <jwerner@chromium.org>
Commit-Queue: Lin Huang <hl@rock-chips.com>
Tested-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/284327
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
51c7967f6d