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Bora Guvendik 1f3458b7b5 intel/amenia: Add MAINBOARD_FAMILY for amenia 
BUG=chrome-os-partner:51844
TEST=Boot to chrome

Change-Id: I66178cc75872f14941434081d9650a569a084d04
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/16135
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-11 17:15:20 +02:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch acpi: Generate object for coreboot table region 2016-08-06 04:35:43 +02:00
commonlib commonlib/region: make buffer argument const for writeat 2016-08-08 18:34:17 +02:00
console console: Add write line routine 2016-08-10 22:30:19 +02:00
cpu Remove non-ascii & unprintable characters 2016-08-01 21:44:45 +02:00
device src/device: Capitalize CPU, RAM and ROM 2016-07-31 18:33:30 +02:00
drivers drivers/intel/fsp2_0: Add fsp_write_line function 2016-08-10 22:30:46 +02:00
ec google/chromeec: Enable/Disable ccache with config variable 2016-08-08 17:36:12 +02:00
include console: Add write line routine 2016-08-10 22:30:19 +02:00
lib lib/timestamp: Add timestamps to CBMEM in POSTCAR stage 2016-08-04 03:27:08 +02:00
mainboard intel/amenia: Add MAINBOARD_FAMILY for amenia 2016-08-11 17:15:20 +02:00
northbridge x4x: make preallocated IGD memory a cmos option 2016-08-09 10:43:03 +02:00
soc soc/intel/common: Add support for serial console based ACPI debug 2016-08-11 16:03:29 +02:00
southbridge chromeos chipsets: select RTC usage 2016-08-08 18:37:37 +02:00
superio superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00
vboot src/vboot: Capitalize RAM and CPU 2016-07-31 19:31:41 +02:00
vendorcode soc/intel/quark: Switch to using serial routines for FSP 2016-08-10 22:31:52 +02:00
Kconfig superio/*: Relocate Kconfig to chip folder. 2016-08-09 10:38:30 +02:00