50eff1c083
To save the S3 power, USB3_HUB_RST_L is externally pulled up to a weak resistor so we have to reset the hub via GPIO84 as early as possible. Otherwise the USB3 hub may be not usable. BUG=b:199822702 TEST=measure voltage of USB3_HUB_RST_L as 1.8V Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ie87d631e83ede819ee9f9951dfc6517beae50247 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57663 Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| board_info.txt | ||
| boardid.c | ||
| bootblock.c | ||
| chromeos.c | ||
| chromeos.fmd | ||
| devicetree.cb | ||
| gpio.h | ||
| Kconfig | ||
| Kconfig.name | ||
| mainboard.c | ||
| Makefile.inc | ||
| memlayout.ld | ||
| regulator.c | ||
| reset.c | ||
| romstage.c | ||
| sdram_configs.c | ||