Pass the serial port address to FSP using a UPD value in the MemoryInit API. TEST=Build and run on Galileo Gen2 BUG=None BRANCH=None TEST=None Change-Id: I86449d80310b7b34ac503ebd2671a4052b080730 Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/15079 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351334 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> |
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| broadcom/cygnus | ||
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| ucb/riscv | ||