coreboot/src/soc/amd
Felix Held c6b71bc614 soc/amd/cezanne/fw.cfg: provide default SPL table binary
Chause doesn't get to x86 bootblock without the SPL table binary in the
PSP directory table, so I assume that Majolica won't get to x86
bootblock either, since the Cezanne SoC default is not to include any
SPL table binary. This was caused by a combination of
commit 6c5ec8e31c (amdfwtool: Add options
to support mainboard specific SPL table) that caused a regression in
amdfwtool and commit c5b912f788
(soc/amd/cezanne: Allow to specify SPL table path in Kconfig) that
removed the default for the Cezanne SoC. Fix this by adding the default
SPL table file back to the fw.cfg file which will get ignored by
amdfwtool when a mainboard selects SPL_TABLE_FILE and specifies another
SPL table binary.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ica960e5422da50899a2d9c192863188174e0bcff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-04-03 17:07:08 +00:00
..
cezanne soc/amd/cezanne/fw.cfg: provide default SPL table binary 2022-04-03 17:07:08 +00:00
common soc/amd/common/block/i2c/i23c_pad_ctrl: only configure mode and voltage 2022-04-01 14:32:12 +00:00
picasso arch/x86/Kconfig: Drop obsolete fixed ramstage symbols 2022-04-01 13:45:07 +00:00
sabrina soc/amd/sabrina/makefile: drop multilevel option in amdfwtool calls 2022-04-01 14:32:53 +00:00
stoneyridge soc/amd/*/lpc: rename SPIROM_BASE_ADDRESS_REGISTER 2022-03-09 19:01:15 +00:00
Kconfig soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig 2020-11-19 14:29:14 +00:00