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coreboot/src/cpu
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Kyösti Mälkki 4f7cb87df2 AGESA: Move config parameters for non-volatile S3 data 
These parameters are not specific to the southbridge device, but
the implementation of S3 storage defined by CPU code.

Change-Id: Ic341cc2b7669cf8e3e920c48473826ec03fc7d8d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6081
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-25 05:43:43 +02:00
..
allwinner Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
amd AGESA: Move config parameters for non-volatile S3 data 2014-06-25 05:43:43 +02:00
armltd Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
dmp Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
intel intel/model_2065x: Add 20652 microcode. 2014-06-17 21:31:01 +02:00
qemu-x86 Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
samsung Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
ti Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
via Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
x86 Misc: Use acpi_is_wakeup_s3() 2014-06-21 08:04:53 +02:00
Kconfig Move ARCH_* from board/Kconfig to cpu or soc Kconfig. 2014-05-03 00:25:20 +02:00
Makefile.inc Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00