Elyes HAOUAS 4e6b7907de src: Fix MSR_PKG_CST_CONFIG_CONTROL register name ... Change-Id: I492224b6900b9658d54c8cf486ef5d64b299687f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>		2018-10-05 01:38:15 +00:00
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hyperthreading.h	Intel CPUs: execute microcode update only once per core	2012-07-02 15:49:07 +02:00
l2_cache.h	src/include: Wrap lines at 80 columns	2017-03-13 17:23:37 +01:00
microcode.h	cpu/intel/microcode: Add helper functions to get microcode info	2018-07-30 18:49:47 +00:00
reset.h	soc/intel/common/block: Common ACPI	2017-09-08 19:01:04 +00:00
romstage.h	cpu/intel/car: Prepare for some POSTCAR_STAGE support	2018-06-02 21:57:51 +00:00
speedstep.h	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	2018-10-05 01:38:15 +00:00
turbo.h	cpu/intel/turbo: Add option to disable turbo	2017-05-16 17:43:28 +02:00