Rizwan Qureshi 4dfe130819 driver/intel/fsp2.0: Add External stage cache region helper ... If ramstage caching outside CBMEM is enabled i.e CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM, then a helper function to determine the caching region in SMM should be implemented. Add the same to FSP2.0 driver. FSP1.1 driver had the same implementation hence copied stage_cache.c. The SoC code should implement the smm_subregion to provide the base and size of the caching region within SMM. The fsp/memmap.h provides the prototype and we will reuse the same from FPS 1.1. Change-Id: I4412a710391dc0cee044b96403c50260c3534e6f Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16312 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)		2016-08-31 17:39:05 +02:00
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fsp1_0	Fix some cbmem.h includes	2016-06-17 00:18:28 +02:00
fsp1_1	vboot: consolidate google_chromeec_early_init() calls	2016-08-25 22:50:17 +02:00
fsp2_0	driver/intel/fsp2.0: Add External stage cache region helper	2016-08-31 17:39:05 +02:00
gma	Add newlines at the end of all coreboot files	2016-08-01 21:43:56 +02:00
i210	intel/i210: Change API for function mainboard_get_mac_address()	2016-07-05 06:27:44 +02:00
wifi	intel/wifi: Include conditionally in the build	2016-07-31 00:07:47 +02:00