Alicja Michalska 4d9549b95f soc/intel: Add definition of D0 stepping for TigerLake Halo ... Change-Id: Ic080ffe7912ad71c77af09d2f3d1d9b08d9ffac8 Signed-off-by: Alicja Michalska <ahplka19@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>		2024-03-05 23:29:17 +00:00
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cpu_ids.h	soc/intel: Add definition of D0 stepping for TigerLake Halo	2024-03-05 23:29:17 +00:00
em64t100_save_state.h	src/include: Drop unneeded empty lines	2020-09-14 07:09:41 +00:00
em64t101_save_state.h	src/include: Drop unneeded empty lines	2020-09-14 07:09:41 +00:00
fsb.h	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
l2_cache.h	src: Remove unnecessary semicolons from the end of macros	2023-11-10 15:27:45 +00:00
microcode.h	cpu/intel/microcode: Have API to re-load microcode patch	2022-06-22 12:35:53 +00:00
msr.h	arch/x86: Reduce max phys address size for Intel TME capable SoCs	2023-09-12 08:12:02 +00:00
post_codes.h	src/*/post_code.h: Change post code prefix to POSTCODE	2023-08-05 16:04:46 +00:00
smm_reloc.h	mb/emulation/qemu-q35: Split smm_close() and smm_lock()	2022-11-17 07:42:55 +00:00
speedstep.h	cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm	2022-12-05 14:22:12 +00:00
turbo.h	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00