coreboot/src/vendorcode
Shelley Chen 4e9bb3308e Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space.  Some platforms have a different way of mapping the PCI config
space to memory.  This patch renames the following configs to
make it clear that these configs are ECAM-specific:

- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH

Please refer to CB:57861 "Proposed coreboot Changes" for more
details.

BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
     Make sure Jenkins verifies that builds on other boards

Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-10 17:24:16 +00:00
..
amd Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
cavium src: use ARRAY_SIZE where possible 2021-02-15 11:30:40 +00:00
eltan src/vendorcode/eltan: Don't reference CONFIG_CBFS_SIZE 2021-07-28 08:19:30 +00:00
google ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
intel vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2374_01 2021-09-28 16:38:44 +00:00
mediatek vc/mediatek/mt8195: Remove unused code and comments 2021-11-01 15:57:11 +00:00
siemens
Makefile.inc soc/mediatek/mt8192: initialize DRAM using vendor reference code 2021-03-08 03:15:43 +00:00