coreboot/src/northbridge/intel
Felix Held 4c4d1948ef nb/intel/sandybridge: assign host bridge ops in chipset devicetree
Since the host bridge is always function 0 of device 0 on bus 0, the
device operations can be statically assigned in the devicetree and
there's no need to bind the host bridge device operations to the PCI
device during runtime via a list of PCI IDs.

TEST=Lenovo X220 still boots to Linux

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79113
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2023-11-18 15:37:50 +00:00
..
common nb/intel/common: Replace _bar_clrsetbits_impl macro 2021-05-03 07:38:52 +00:00
e7505 device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
gm45 device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
haswell device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
i440bx device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
i945 device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
ironlake Use common GCD function 2023-11-04 17:06:42 +00:00
pineview device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
sandybridge nb/intel/sandybridge: assign host bridge ops in chipset devicetree 2023-11-18 15:37:50 +00:00
x4x device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00