coreboot/src
Kevin Chiu 4aaea85044 mb/google/guybrush/var/nipperkin: config eSPI as dedicated alert
Setup eSPI to dedicated alert per the latest schematic changes.
DUT won't hang up at power on boot due to eSPI alert is triggerred
unexpectedly.

BUG=b:199458949,b:203446084
BRANCH=guybrush
TEST=emerge-guybrush coreboot chromeos-bootimage
     test power on/reboot on DUT (6 units) each 10 loops->pass

Change-Id: I55cda7a1af22e555a4f55285cb7e337a69e6c234
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
2021-12-17 14:44:57 +00:00
..
acpi acpi,Makefile: Add preload_acpi_dsdt 2021-11-29 20:35:33 +00:00
arch arch/x86/c_start.S: Remove duplicated "the" in comments 2021-12-13 23:46:54 +00:00
commonlib lib: Add __fls() (Find Last Set) 2021-12-13 02:57:07 +00:00
console src/acpi to src/lib: Fix spelling errors 2021-10-05 18:06:39 +00:00
cpu cpu/x86/mp_init.c: Make it work for !CONFIG_SMP 2021-12-10 15:57:34 +00:00
device device/pci_device.c: Scan only one device for PCIe 2021-11-29 03:19:51 +00:00
drivers drivers/spi/spi-generic: document SPI_CNTRLR_DEDUCT_CMD_LEN better 2021-12-15 22:39:21 +00:00
ec ec/google/chromeec: Support 5 temperature sensors 2021-11-26 11:19:52 +00:00
include rules.h, thread.h, lib/cbfs: Add ENV_STAGE_SUPPORTS_COOP 2021-12-15 23:25:32 +00:00
lib Spell *Boot Guard* with a space for official spelling 2021-12-16 14:17:36 +00:00
mainboard mb/google/guybrush/var/nipperkin: config eSPI as dedicated alert 2021-12-17 14:44:57 +00:00
northbridge Spell *Boot Guard* with a space for official spelling 2021-12-16 14:17:36 +00:00
security Revert "security/vboot: Add NVRAM counter for TPM 2.0" 2021-12-16 20:58:30 +00:00
soc Spell *Boot Guard* with a space for official spelling 2021-12-16 14:17:36 +00:00
southbridge sb/amd/pi/hudson/early_init: fix setting SPI_USE_SPI100 in SPI100_ENABLE 2021-12-08 13:48:32 +00:00
superio superio/smsc/sch5545: Disable PS/2 lines isolation during init 2021-11-27 14:23:08 +00:00
vendorcode vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 2021-12-13 06:09:15 +00:00
Kconfig Kconfig: Show console DEBUG_FUNC if OVERRIDE_LOGLEVEL is set 2021-11-13 00:20:11 +00:00