Angel Pons 4a9569a123 nb/intel/x4x: Use PCI bitwise ops ... Tested with BUILD_TIMELESS=1, Intel DG43GT does not change. Change-Id: I1bb7a7fd808cbbb45efbbfb9581c6a948323a48f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42155 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-06-09 17:52:29 +00:00
..
acpi	acpi: Rename motherboard_fill_fadt() to mainboard_fill_fadt()	2020-06-07 21:53:33 +00:00
arch	SMBIOS: Remove Kconfig SYSTEM_ENCLOSURE_TYPE	2020-06-09 06:29:59 +00:00
commonlib	commonlib: Add CBFS_TYPE_BOOTBLOCK	2020-06-02 07:26:44 +00:00
console	treewide: Remove "this file is part of" lines	2020-05-11 17:11:40 +00:00
cpu	src: Remove unused 'include <cpu/x86/mtrr.h>'	2020-06-06 09:43:11 +00:00
device	device: Add a disabling PCIe device bus master function	2020-06-08 06:39:01 +00:00
drivers	spi: Remove non_volatile flag from block protection interface	2020-06-08 07:51:18 +00:00
ec	ec/google/chromeec: Append connector device to *-switch properties	2020-06-08 06:41:11 +00:00
include	pci_ops.h: Turn and/or ops into update wrappers	2020-06-09 00:26:12 +00:00
lib	fw_config: Add firmware configuration interface	2020-06-02 16:40:04 +00:00
mainboard	mb/google/hatch/vr/puff: Set up PL2 and PsysPL2	2020-06-09 06:30:40 +00:00
northbridge	nb/intel/x4x: Use PCI bitwise ops	2020-06-09 17:52:29 +00:00
security	src: Remove unused 'include <fmap.h>'	2020-06-02 07:42:40 +00:00
soc	soc/intel/tigerlake: Increase heap size	2020-06-09 16:29:23 +00:00
southbridge	Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register"	2020-06-09 06:28:47 +00:00
superio	superio/nuvoton/nct6776: Reflow pnp_dev_info array	2020-06-08 12:05:02 +00:00
vendorcode	vendorcode/amd: Remove duplicate assignment	2020-06-07 21:56:03 +00:00
Kconfig	SMBIOS: Remove Kconfig SYSTEM_ENCLOSURE_TYPE	2020-06-09 06:29:59 +00:00