SPI_ATOMIC_SEQUENCING was added to accomodate spi flash controllers with the ability to perform tx and rx of flash command and response at the same time. Instead of introducing this notion at SPI flash driver layer, clean up the interface to SPI used by flash. Flash uses a command-response kind of communication. Thus, even though SPI is duplex, flash command needs to be sent out on SPI bus and then flash response should be received on the bus. Some specialized x86 flash controllers are capable of handling command and response in a single transaction. In order to support all the varied cases: 1. Add spi_xfer_vector that takes as input a vector of SPI operations and calls back into SPI controller driver to process these operations. 2. In order to accomodate flash command-response model, use two vectors while calling into spi_xfer_vector -- one with dout set to non-NULL(command) and other with din set to non-NULL(response). 3. For specialized SPI flash controllers combine two successive vectors if the transactions look like a command-response pair. 4. Provide helper functions for common cases like supporting only 2 vectors at a time, supporting n vectors at a time, default vector operation to cycle through all SPI op vectors one by one. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: I4c9e78c585ad95c40c0d5af078ff8251da286236 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17681 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
219 lines
7 KiB
C
219 lines
7 KiB
C
/*
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* (C) Copyright 2001
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _SPI_GENERIC_H_
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#define _SPI_GENERIC_H_
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#include <stdint.h>
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#include <stddef.h>
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/* Controller-specific definitions: */
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struct spi_ctrlr;
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/*-----------------------------------------------------------------------
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* Representation of a SPI slave, i.e. what we're communicating with.
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*
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* bus: ID of the bus that the slave is attached to.
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* cs: ID of the chip select connected to the slave.
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* ctrlr: Pointer to SPI controller structure.
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*/
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struct spi_slave {
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unsigned int bus;
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unsigned int cs;
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const struct spi_ctrlr *ctrlr;
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};
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/* Representation of SPI operation status. */
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enum spi_op_status {
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SPI_OP_NOT_EXECUTED = 0,
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SPI_OP_SUCCESS = 1,
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SPI_OP_FAILURE = 2,
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};
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/*
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* Representation of a SPI operation.
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*
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* dout: Pointer to data to send.
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* bytesout: Count of data in bytes to send.
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* din: Pointer to store received data.
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* bytesin: Count of data in bytes to receive.
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*/
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struct spi_op {
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const void *dout;
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size_t bytesout;
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void *din;
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size_t bytesin;
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enum spi_op_status status;
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};
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/*-----------------------------------------------------------------------
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* Representation of a SPI contoller.
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*
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* claim_bus: Claim SPI bus and prepare for communication.
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* release_bus: Release SPI bus.
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* setup: Setup given SPI device bus.
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* xfer: Perform one SPI transfer operation.
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* xfer_vector: Vector of SPI transfer operations.
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*/
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struct spi_ctrlr {
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int (*claim_bus)(const struct spi_slave *slave);
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void (*release_bus)(const struct spi_slave *slave);
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int (*setup)(const struct spi_slave *slave);
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int (*xfer)(const struct spi_slave *slave, const void *dout,
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size_t bytesout, void *din, size_t bytesin);
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int (*xfer_vector)(const struct spi_slave *slave,
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struct spi_op vectors[], size_t count);
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};
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/*-----------------------------------------------------------------------
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* Structure defining mapping of SPI buses to controller.
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*
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* ctrlr: Pointer to controller structure managing the given SPI buses.
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* bus_start: Start bus number managed by the controller.
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* bus_end: End bus number manager by the controller.
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*/
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struct spi_ctrlr_buses {
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const struct spi_ctrlr *ctrlr;
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unsigned int bus_start;
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unsigned int bus_end;
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};
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/* Mapping of SPI buses to controllers - should be defined by platform. */
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extern const struct spi_ctrlr_buses spi_ctrlr_bus_map[];
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extern const size_t spi_ctrlr_bus_map_count;
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/*-----------------------------------------------------------------------
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* Initialization, must be called once on start up.
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*
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*/
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void spi_init(void);
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/*-----------------------------------------------------------------------
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* Set up communications parameters for a SPI slave.
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*
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* This must be called once for each slave. Note that this function
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* usually doesn't touch any actual hardware, it only initializes the
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* contents of spi_slave so that the hardware can be easily
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* initialized later.
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*
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* bus: Bus ID of the slave chip.
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* cs: Chip select ID of the slave chip on the specified bus.
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* slave: Pointer to slave structure that needs to be initialized.
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*
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* Returns:
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* 0 on success, -1 on error
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*/
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int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave);
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/*-----------------------------------------------------------------------
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* Claim the bus and prepare it for communication with a given slave.
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*
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* This must be called before doing any transfers with a SPI slave. It
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* will enable and initialize any SPI hardware as necessary, and make
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* sure that the SCK line is in the correct idle state. It is not
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* allowed to claim the same bus for several slaves without releasing
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* the bus in between.
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*
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* slave: The SPI slave
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*
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* Returns: 0 if the bus was claimed successfully, or a negative value
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* if it wasn't.
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*/
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int spi_claim_bus(const struct spi_slave *slave);
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/*-----------------------------------------------------------------------
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* Release the SPI bus
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*
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* This must be called once for every call to spi_claim_bus() after
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* all transfers have finished. It may disable any SPI hardware as
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* appropriate.
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*
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* slave: The SPI slave
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*/
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void spi_release_bus(const struct spi_slave *slave);
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/*-----------------------------------------------------------------------
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* SPI transfer
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*
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* spi_xfer() interface:
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* slave: The SPI slave which will be sending/receiving the data.
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* dout: Pointer to a string of bytes to send out.
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* bytesout: How many bytes to write.
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* din: Pointer to a string of bytes that will be filled in.
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* bytesin: How many bytes to read.
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
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void *din, size_t bytesin);
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/*-----------------------------------------------------------------------
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* Vector of SPI transfer operations
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*
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* spi_xfer_vector() interface:
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* slave: The SPI slave which will be sending/receiving the data.
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* vectors: Array of SPI op structures.
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* count: Number of SPI op vectors.
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int spi_xfer_vector(const struct spi_slave *slave,
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struct spi_op vectors[], size_t count);
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unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len);
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/*-----------------------------------------------------------------------
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* Write 8 bits, then read 8 bits.
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* slave: The SPI slave we're communicating with
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* byte: Byte to be written
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*
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* Returns: The value that was read, or a negative value on error.
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*
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* TODO: This function probably shouldn't be inlined.
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*/
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static inline int spi_w8r8(const struct spi_slave *slave, unsigned char byte)
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{
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unsigned char dout[2];
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unsigned char din[2];
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int ret;
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dout[0] = byte;
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dout[1] = 0;
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ret = spi_xfer(slave, dout, 2, din, 2);
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return ret < 0 ? ret : din[1];
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}
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/*
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* Helper function to allow chipsets to combine two vectors if possible. It can
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* only handle upto 2 vectors.
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*
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* This function is provided to support command-response kind of transactions
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* expected by users like flash. Some special SPI flash controllers can handle
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* such command-response operations in a single transaction. For these special
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* controllers, separate command and response vectors can be combined into a
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* single operation.
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*
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* Two vectors are combined if first vector has a non-NULL dout and NULL din and
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* second vector has a non-NULL din and NULL dout. Otherwise, each vector is
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* operated upon one at a time.
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*
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* Returns 0 on success and non-zero on failure.
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*/
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int spi_xfer_two_vectors(const struct spi_slave *slave,
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struct spi_op vectors[], size_t count);
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#endif /* _SPI_GENERIC_H_ */
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