Arthur Heymans bccb6916fe security/intel/txt/ramstage.c: Fix clearing secrets on CBNT ... intel_txt_memory_has_secret() checks for ESTS.TXT_ESTS_WAKE_ERROR_STS || E2STS.TXT_E2STS_SECRET_STS and it looks like with CBNT the E2STS bit can be set without the ESTS bit. Change-Id: Iff4436501b84f5c209add845b3cd3a62782d17e6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47934 Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-01-04 23:09:22 +00:00
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cbnt	sec/intel/cbnt: Stitch in ACMs in the coreboot image	2020-11-10 06:17:24 +00:00
stm	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
txt	security/intel/txt/ramstage.c: Fix clearing secrets on CBNT	2021-01-04 23:09:22 +00:00
Kconfig	sec/intel/cbnt: Stitch in ACMs in the coreboot image	2020-11-10 06:17:24 +00:00
Makefile.inc	sec/intel/cbnt: Stitch in ACMs in the coreboot image	2020-11-10 06:17:24 +00:00