Arthur Heymans 4821a0e135 soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE ... What it really means to do is to use different FSP headers. Change-Id: I3c75d4aac8525ab2639608fb9c1b3a9afef0e943 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33575 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2019-06-21 08:59:15 +00:00
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amd	soc/amd/common: Add errors for invalid AcpiMmio access	2019-06-11 14:39:05 +00:00
cavium	device_tree: Make FDT property data non-const	2019-06-04 11:24:46 +00:00
imgtec
intel	soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE	2019-06-21 08:59:15 +00:00
mediatek	mediatek/mt8183: set vproc12 voltage correctly	2019-06-21 08:44:53 +00:00
nvidia	src/soc: Add missing 'include <types.h>'	2019-05-29 20:28:56 +00:00
qualcomm	qcom: Add i2c driver	2019-06-12 14:31:55 +00:00
rockchip	soc/rockchip/rk3288: Disable bootblock console	2019-05-30 03:46:20 +00:00
samsung	Fix code that would trip -Wtype-limits	2019-05-06 10:32:15 +00:00
sifive
ucb