coreboot/src
Angel Pons 47a80a045d nb/intel/sandybridge: Move steppings to CPU header
The steppings correspond to the CPUID bits 3:0, so move them to the CPU
scope, and include the CPU header from files using the stepping macros.

Change-Id: Idf8fba4911f98953bb909777aea57295774d8400
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48409
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-25 21:41:55 +00:00
..
acpi ACPI: Allocate GNVS early in ramstage 2020-12-25 02:29:14 +00:00
arch arch/arm: Replace .id section with build_info in CBFS 2020-12-17 06:25:25 +00:00
commonlib drivers/tpm: Implement full PPI 2020-12-21 02:38:20 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu nb/intel/sandybridge: Move steppings to CPU header 2020-12-25 21:41:55 +00:00
device azalia: Use azalia_enter_reset function 2020-12-17 20:25:09 +00:00
drivers drivers/ipmi: Add Supermicro OEM commands 2020-12-25 02:25:49 +00:00
ec src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
include ACPI: Allocate GNVS early in ramstage 2020-12-25 02:29:14 +00:00
lib ACPI: Allocate GNVS early in ramstage 2020-12-25 02:29:14 +00:00
mainboard mb/google/dedede: Update galtic device tree 2020-12-25 02:27:08 +00:00
northbridge nb/intel/sandybridge: Move steppings to CPU header 2020-12-25 21:41:55 +00:00
security cbfs: Add verification for RO CBFS metadata hash 2020-12-03 00:11:08 +00:00
soc ACPI: Fix some GNVS field comments 2020-12-25 02:28:02 +00:00
southbridge sb,soc/intel: Fix GNVS OperationRegion 2020-12-25 02:27:37 +00:00
superio src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
vendorcode vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1514_11 2020-12-23 03:32:42 +00:00
Kconfig Kconfig: Show console debug options if loglevel override is set 2020-12-11 15:58:24 +00:00