coreboot/src
Ronald G. Minnich 6dc937f328 updated
2002-11-18 20:38:36 +00:00
..
arch added verify_copy_pirq_routing_table 2002-11-14 03:42:24 +00:00
bioscall more fixes. Matrox cards work OK now. 2002-03-31 06:25:56 +00:00
boot Updates to produce a linuxBIOS table. Modeled on the earlier 2002-01-08 07:04:35 +00:00
config There was a serious problem in the ldsetup scripts. If the BIOS contained an odd length rodata, LD would make a bad stripped file. The objcopy tool deals poorly with sections that are not longword aligned. This resulted in the BIOS almost working, but it would be referencing the wrong offsets for some key data. by Kevin Hester 2002-11-10 06:30:18 +00:00
cpu A fix for the old outb 0x80 based calibrate_tsc 2002-10-26 00:49:25 +00:00
etherboot added opject command for timer.c 2002-01-04 07:00:26 +00:00
include First commit of baremetal 2002-11-12 16:32:01 +00:00
kernel_patches added kernel patch and config file for 2.4.19 2002-09-03 02:56:32 +00:00
lib fixed postcode to serial by Kevin Hester 2002-11-10 06:25:48 +00:00
mainboard updated 2002-11-18 20:38:36 +00:00
northbridge used value from Kevin Hester's reference board to stabilize sdram init 2002-11-10 06:27:47 +00:00
northsouthbridge add minimal cmos setting 2002-08-16 06:53:06 +00:00
pc80 dd write functionality if DANGER_IDE_WRITE defined 2002-11-11 21:30:45 +00:00
pcibridge/TI/pci1225 added files for Tyson's new stuff. 2001-02-09 04:38:11 +00:00
ram src/northbridge/intel/E7500/{sync the directory} 2002-10-10 23:55:18 +00:00
rom First commit of baremetal 2002-11-12 16:32:01 +00:00
sdram - Theoretical bug fixes for the memory setup, 2002-10-26 00:43:39 +00:00
southbridge update status for smartcore-p3 2002-11-15 21:26:45 +00:00
standalone Hopefully this is my last commit of major infrasture changes for a while. 2002-01-16 05:54:23 +00:00
superio updated to pci direct interface by Kevin Hester 2002-11-10 06:53:25 +00:00