According to BKDG: "Memory controller (MCT) and DRAM controllers (DCTs) additions: • Support for 933 MHz (1866 MT/s) MEMCLK frequency." Change-Id: I6f307ce3fcb355d5445f1ea86def73a41b928a57 Signed-off-by: Konstantin Aladyshev <aladyshev@nicevt.ru> Reviewed-on: http://review.coreboot.org/2589 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com> |
||
|---|---|---|
| .. | ||
| h8dme | ||
| h8dmr | ||
| h8dmr_fam10 | ||
| h8qgi | ||
| h8qme_fam10 | ||
| h8scm | ||
| h8scm_fam10 | ||
| x6dai_g | ||
| x6dhe_g | ||
| x6dhe_g2 | ||
| x6dhr_ig | ||
| x6dhr_ig2 | ||
| x7db8 | ||
| Kconfig | ||