coreboot/src/soc/intel/common
Duncan Laurie 46a2c77aaf intel: common: Let mainboard supplement FSP memory info
Since the FSP memory info HOB does not return all the data that we
need about a DIMM add a weak function that will allow the mainboard
to supplement the generated memory_info structure.

Ideally this would not be necessary but until FSP returns the
module part number we need this.

BUG=chrome-os-partner:42975, chrome-os-partner:42561
BRANCH=none
TEST=run "mosys memory spd print all" on glados

Change-Id: Ic6d0ee0a31d23efcf7e7d7f18a74e944e09e7b46
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 34ad7f1906ba526e52d38d5a6bce7b88b83f0c13
Original-Change-Id: I8509c5c627c1605894473fdea567e7f7ede08cf9
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/286876
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11033
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-23 16:42:21 +02:00
..
fsp_ramstage.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
gma.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
hda_verb.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
hda_verb.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Kconfig intel fsp: remove CHIPSET_RESERVED_MEM_BYTES 2015-07-21 20:09:31 +02:00
Makefile.inc Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
memmap.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
mrc_cache.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
mrc_cache.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
raminit.c intel fsp: remove CHIPSET_RESERVED_MEM_BYTES 2015-07-21 20:09:31 +02:00
ramstage.h Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c intel: common: Let mainboard supplement FSP memory info 2015-07-23 16:42:21 +02:00
romstage.h intel: common: Let mainboard supplement FSP memory info 2015-07-23 16:42:21 +02:00
stack.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stack.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stage_cache.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
util.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
util.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
vbt.c Braswell: Remove GOP from normal boot mode. 2015-07-21 20:07:54 +02:00