coreboot/src/arch
Aaron Durbin 4587f84757 arch/x86: clarify raw CAR_GLOBAL access guards
Romstage is where DRAM comes online. Therefore, allow
raw CAR_GLOBAL object access in all cache-as-ram stages
that are not romstage. In practice, this should be a nop.
However, the explicit check for romstage is clearer.

Change-Id: I31454c05029140a946ef663b8fa1b2fa6a788154
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/29401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-11-01 21:33:13 +00:00
..
arm selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
arm64 selfboot: create selfboot_check function, remove check param 2018-10-25 16:57:51 +00:00
mips selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
power8 selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
riscv src: Add missing include <stdint.h> 2018-10-30 09:41:08 +00:00
x86 arch/x86: clarify raw CAR_GLOBAL access guards 2018-11-01 21:33:13 +00:00