df9a040e75
To bring genoa_poc more in line with the other AMD SoCs, move the reporting of the memory map up to cbmem_top from the openSIL-specific add_opensil_memmap function to read_soc_memmap_resources. This is a preparation for making this code common for all newer AMD SoCs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic06282baa3bb9a65d297b5717697a12d08605d2f Reviewed-on: https://review.coreboot.org/c/coreboot/+/81388 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| eltan | ||
| intel | ||
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| Makefile.mk | ||
| README.md | ||
The files in the coreboot src/vendorcode subdirectory are supplied by various hardware and software vendors to support their platforms. While these directories and files are a part of the coreboot project, their licenses, coding styles, and maintenance may be significantly different than the rest of the coreboot codebase.
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