Srinidhi N Kaushik 445dd85bf9 vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v4133 ... Update FSP headers for Tiger Lake platform generated based on FSP version 4133. Previous version was 4043. BUG=b:185463045 BRANCH=none TEST=build and boot voxel Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: I27d8f7783a944bdd21e3615799b1342ffb0edd22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>		2021-04-15 23:33:42 +00:00
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amd	vc/amd/fsp/cezanne/FspmUpd: use arrays for DXIO/DDI descriptors	2021-04-07 22:48:55 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	vc/eltan/security/mboot/Kconfig: Add dependency of VBOOT	2021-04-06 07:01:31 +00:00
google	vc/google/chromeos/acpi: Add type to OIPG declaration	2021-03-18 18:10:35 +00:00
intel	vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v4133	2021-04-15 23:33:42 +00:00
mediatek	vendorcode/mt8192: change to short log macro names	2021-03-16 11:19:42 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00