nick_xr_chen 44097e21cc mb/google/volteer/variants/eldrid: add memory.c for ddr4 support ... Add new memory.c to support DDR4 memory types. Use the new meminit_ddr() and variant_memory_sku() for eldrid variant code on memory.c The initial settings override the baseboard from volteer and fine tune gpio.c and overridetree.cb on eldrid's configuration. BUG=b:161772961 TEST='emerge-volteer coreboot chromeos-bootimage' and verify that Eldrid can boots. NOTE that tests the ddr4 side of the implementation. Change-Id: I2c7b30093a8d85bac5aba5b83768af5eb36c4f70 Signed-off-by: Nick Chen <nick_xr_chen@wistron.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44632 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>		2020-09-09 13:37:41 +00:00
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acpi
arch	memory_info: add max_speed_mts and configured_speed_mts	2020-09-03 21:27:54 +00:00
commonlib
console	ec/system76: Add console support	2020-09-07 21:46:34 +00:00
cpu
device	device: Add method to configure bus mastering based on Kconfig	2020-08-31 18:34:22 +00:00
drivers	drivers/aspeed/common: Support disabled P2A bridge	2020-09-09 10:37:13 +00:00
ec	ec/system76: Add console support	2020-09-07 21:46:34 +00:00
include	pci_ids: Add Alder Lake DTT PCI IDs	2020-09-08 12:56:58 +00:00
lib	lib/Kconfig: Drop obsolete help text from GENERIC_SPD_BIN	2020-09-08 05:47:33 +00:00
mainboard	mb/google/volteer/variants/eldrid: add memory.c for ddr4 support	2020-09-09 13:37:41 +00:00
northbridge	nb/intel/ironlake: Use an enum for gpu_panel_port_select	2020-09-08 05:27:26 +00:00
security
soc	soc/ti/am335x: Fix MLO build	2020-09-09 10:49:05 +00:00
southbridge	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	2020-09-01 03:06:04 +00:00
superio	superio/winbond/wpcd376i: Resurrect the driver	2020-08-31 06:29:47 +00:00
vendorcode	vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332	2020-09-09 05:16:34 +00:00
Kconfig