coreboot/src
Mark Hasemeyer 431ca5eab5 ec/google/chromeec: Provide ec_sync wake option
The ACPI spec defines keywords for the GpioInt and Interrupt resources
to specify whether a given pin is wake capable. Some boards are using
the ec sync interrupt pin to wake the system so the CREC _CRS needs to
be updated accordingly.

Provide a new macro that allows a board to specify whether its ec sync
pin is wake capable.

BUG=b:243700486
TEST=Dump ACPI and verify ExclusiveAndWake share type is set when
     EC_SYNC_IRQ_WAKE_CAPABLE is defined

Change-Id: I483c801ff0fee4d3ce0a3b2fc220e0bd9356a612
Signed-off-by: Mark Hasemeyer <markhas@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Forest Mittelberg <bmbm@google.com>
2023-12-11 14:33:23 +00:00
..
acpi acpi.c: Fix generating pointer to cb_tables located >4G 2023-12-08 14:02:45 +00:00
arch arch/riscv/payload: Remove old RISC-V CSR names 2023-12-09 15:27:36 +00:00
commonlib vendorcode/amd/opensil: Add initial setup and API calls 2023-12-06 18:32:58 +00:00
console Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00
cpu cpu/intel/model_206ax: Use macro IS_IVY_CPU 2023-12-04 15:54:45 +00:00
device device/Kconfig: rename AZALIA_PLUGIN_SUPPORT to AZALIA_HDA_CODEC_SUPPORT 2023-11-10 15:27:58 +00:00
drivers drivers: spi_flash: Add space before colon to fix coding style 2023-11-16 11:59:20 +00:00
ec ec/google/chromeec: Provide ec_sync wake option 2023-12-11 14:33:23 +00:00
include acpi/acpi_gic: Add GIC ITS subtable 2023-12-06 13:07:27 +00:00
lib lib/device_tree.c: Fix print_property 2023-11-16 12:01:40 +00:00
mainboard mb/google/nissa/var/quandiso: Tune P-sensor 2023-12-11 10:46:32 +00:00
northbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
sbom sbom/Makefile.inc: Change GOPATH 2023-11-20 14:32:54 +00:00
security Makefile: Make vboot_fw.a a .PHONY target 2023-12-08 17:44:38 +00:00
soc soc/amd/genoa/chipset.cb: add missing '_' in gpp_bridge_3_b 2023-12-11 11:57:02 +00:00
southbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
superio superio/smsc: Add support for the SCH555x series 2023-12-01 17:40:11 +00:00
vendorcode vc/intel/fsp/mtl: Update header files from 3323_86 to 3424_88 2023-12-11 05:05:17 +00:00
Kconfig Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00