coreboot/src
Jacob Garber 4318a978a7 vc/amd/agesa/f14: Add missing break statement
We do not want to ASSERT(FALSE).

Found-by: Coverity Scan, CID 1241850 (MISSING_BREAK)
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: Ia08bb519cdb5ef5d2a79898706c7fac7e58adf3f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-04-07 03:27:52 +00:00
..
acpi
arch device/pci: Rewrite PCI MMCONF with symbol reference 2019-04-07 02:31:36 +00:00
commonlib src: Use #include <timer.h> when appropriate 2019-04-06 16:02:49 +00:00
console coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
cpu src: Use #include <timer.h> when appropriate 2019-04-06 16:02:49 +00:00
device device/pci: Rewrite PCI MMCONF with symbol reference 2019-04-07 02:31:36 +00:00
drivers src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
ec src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
include device/pci: Rewrite PCI MMCONF with symbol reference 2019-04-07 02:31:36 +00:00
lib src: Use #include <timer.h> when appropriate 2019-04-06 16:02:49 +00:00
mainboard src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
northbridge src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
security src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
soc src: Use include <delay.h> when appropriate 2019-04-06 16:09:12 +00:00
southbridge sb/intel/{common,i82801dx}: Improve TCO debug code 2019-04-07 02:43:26 +00:00
superio src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
vendorcode vc/amd/agesa/f14: Add missing break statement 2019-04-07 03:27:52 +00:00
Kconfig x86/smbios: Untangle system and board tables 2019-03-16 16:22:16 +00:00