Shreesh Chhabbi 42b1d3fccf mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOS ... Selecting USE_CAR_NEM_ENHANCED_V1 as of now. This selection in Kconfig programs IA32_L3_MASK_1 (0xc91) & IA32_L3_MASK_2 (0xc92). These will select ways for eviction & non-eviction. TGL will have to switch back to USE_CAR_NEM_ENHANCED_V2 once the IA32_L3_SF_MASK_1 (0x1891) & IA32_L3_SF_MASK_2 (0x1892) programming requirements are understood. Bug=b:171601324 BRANCH=volteer Test=Build coreboot for volteer. Boot on SKU that has 4MB L3 cache. Change-Id: Ifc77856e26ab26f9fbb2693f70c751f43337421b Signed-off-by: Shreesh Chhabbi <shreesh.chhabbi@intel.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2020-11-11 20:44:31 +00:00
..
amd	soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration	2020-11-09 10:20:18 +00:00
cavium	soc/cavium: Drop unneeded empty lines	2020-09-22 17:14:49 +00:00
example	x86: Add a minimal example SoC along with a board	2020-10-30 21:34:18 +00:00
intel	mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOS	2020-11-11 20:44:31 +00:00
mediatek	soc/mediatek/mt8192: Do dram full calibration	2020-10-29 00:30:34 +00:00
nvidia	soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tab	2020-11-09 10:31:32 +00:00
qualcomm	sc7180: Correct mmu configuration for AOP SRAM regions	2020-11-06 22:34:25 +00:00
rockchip	soc/rockchip/rk3288/include/soc/display.h: Add missing includes	2020-10-19 07:12:07 +00:00
samsung	src/soc/samsung: Move common headers to "common/include/soc"	2020-10-19 07:11:32 +00:00
sifive	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ti	include/console/uart: make index parameter unsigned	2020-09-12 14:59:33 +00:00
ucb