coreboot/src/soc/intel
Kane Chen 415eadb90b soc/intel/{adl,common}: Support alderlake host device id 0x4619
Host device id 0x4619 is missed in few coreboot tables so that
coreboot can't recognize and config it properly.

Document Number: 690222
BUG🅱️214665785, b:214680767

Change-Id: I95908bdc0a736bafedb328dda2a00b5473de3d88
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-01-18 04:35:06 +00:00
..
alderlake soc/intel/{adl,common}: Support alderlake host device id 0x4619 2022-01-18 04:35:06 +00:00
apollolake soc/intel/apl: Use Kconfig to disable HECI1 2022-01-11 19:18:02 +00:00
baytrail src: Use 'stdint.h' when appropriate 2022-01-01 14:58:44 +00:00
braswell Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
broadwell sb/intel: Use bool for PCIe coalescing option 2022-01-04 11:48:19 +00:00
cannonlake soc/intel/cnl: Use Kconfig to disable HECI1 2022-01-17 15:49:24 +00:00
common soc/intel/{adl,common}: Support alderlake host device id 0x4619 2022-01-18 04:35:06 +00:00
denverton_ns pci_ids.h: Make Denverton IDs consistent with other Intel SoCs 2022-01-17 15:50:52 +00:00
elkhartlake src/soc/intel: Remove unused <console/console.h> 2022-01-10 23:25:01 +00:00
icelake src/soc/intel: Remove unused <console/console.h> 2022-01-10 23:25:01 +00:00
jasperlake soc/intel/jsl: Replace dt HeciEnabled by HECI1 disable config 2022-01-14 00:33:23 +00:00
quark Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
skylake soc/intel/skl: Replace dt HeciEnabled by HECI1 disable config 2022-01-16 13:33:14 +00:00
tigerlake soc/intel/tgl: Replace dt HeciEnabled by HECI1 disable config 2022-01-14 00:33:14 +00:00
xeon_sp src/soc: Remove unused <stdlib.h> 2022-01-10 23:30:56 +00:00
Kconfig
Makefile.inc soc/intel/common/cse: Add support for stitching CSE components 2021-10-19 16:09:08 +00:00