erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/payloads
History
Stefan Reinauer 42b3ec58a8 libpayload (EHCI): correctly align PORTSC 
Two structures in the USB EHCI stack were pointing
to hardware but not marked attribute((packed)) hence
leaving it to GCC to correctly align the data structures.

Next, the number of reserved bytes in hc_op_t was wrong
(but implicitly aligned to the correct values on x86)

It seems this worked fine on x86, but on ARM it was doing
the wrong thing.

BUG=chrome-os-partner:18635
TEST=more changes needed
BRANCH=none
Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I94bed4850ded7d3f7bbc7ff3079c103c6054c22d
Reviewed-on: https://gerrit.chromium.org/gerrit/55555
Commit-Queue: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
2013-05-20 16:09:38 -07:00
..
bayou GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
coreinfo GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
external bump SeaBIOS to 1.7.2.1 2013-03-04 11:00:17 +01:00
libpayload libpayload (EHCI): correctly align PORTSC 2013-05-20 16:09:38 -07:00
nvramcui GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
tianocoreboot GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00