Raul E Rangel 409e5cb0f6 soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume ... We need to save the transfer buffer so we can transfer the cbmem console and timestamps into x86 DRAM. BUG=b:221231786 TEST=Boot guybrush and verify S0i3 resume works. Also dumped the transfer buffer from the OS and verified the console contents got transferred. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1d3b34c90e0e18609b0c6a0cdedab35aeefbd84b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62347 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2022-03-02 21:09:40 +00:00
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cezanne	arch/x86: consolidate HPET base address definitions	2022-02-25 17:44:11 +00:00
common	soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume	2022-03-02 21:09:40 +00:00
picasso	soc/amd/{common/psp_verstage,soc/picasso}: Remove workbuf shrinking	2022-02-26 00:09:18 +00:00
sabrina	soc/amd/sabrina: Add XHCI configuration	2022-02-28 13:29:24 +00:00
stoneyridge	arch/x86: consolidate HPET base address definitions	2022-02-25 17:44:11 +00:00
Kconfig