coreboot/src
Elyes HAOUAS 400ce55566 cpu/amd: Use common AMD's MSR
Phase 1. Due to the size of the effort, this CL is broken into several
phases.

Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2018-10-18 12:51:26 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch arch/x86/exception: Improve the readability of a comment 2018-10-17 12:01:51 +00:00
commonlib commonlib/storage: Make pci sdhci code compile in romstage 2018-10-11 10:57:07 +00:00
console console: Set default loglevel to 8 (SPEW) for CONFIG_CHROMEOS 2018-10-18 12:50:41 +00:00
cpu cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
device Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
drivers drivers/intel/fsp*: Use newly added post codes for memory param prep 2018-10-18 12:46:12 +00:00
ec ec/google/chromeec: Add support for querying ec board id in smm stage 2018-10-11 23:58:10 +00:00
include cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
lib selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
mainboard cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
northbridge cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
security vboot: do not extend PCRs on resume from S3 2018-10-17 12:04:58 +00:00
soc cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
southbridge cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
superio superio/ite/it8721f: Add SuperIO ACPI declarations 2018-08-21 14:45:36 +00:00
vendorcode vc/google/chromeos/ec: remove EC hibernate in cr50 update path 2018-10-15 13:56:01 +00:00
Kconfig src/Kconfig: Drop a superfluous word 2018-10-01 15:28:47 +00:00