coreboot/src
Timothy Pearson 99e27ceb6d mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage
The existing memory test routine was insufficient to detect certain types
of bus instability related to multiple incompatible RDIMMs on one channel.

Add a PRNG second stage test to the memory test routine.  This second stage
test reliably detects faults in memory setup for RDIMM configurations that
also fail under the proprietary BIOS.

Change-Id: I44721447ce4c2b728d4a8f328ad1a3eb8f324d3d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14502
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-26 16:54:47 +02:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch lib: add common write_tables() implementation 2016-04-21 20:49:05 +02:00
commonlib ensure correct byte ordering for cbfs segment list 2016-04-25 23:30:00 +02:00
console arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
cpu cpu/x86/tsc: Compile TSC timer for postcar as well 2016-04-11 17:56:57 +02:00
device payloads: add iPXE 'payload' build 2016-04-13 17:45:37 +02:00
drivers drivers/ricoh: Fully switch to src/drivers/[X]/[Y]/ scheme 2016-04-22 20:11:52 +02:00
ec kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme 2016-04-19 18:34:18 +02:00
include lib: add common write_tables() implementation 2016-04-21 20:49:05 +02:00
lib ensure correct byte ordering for cbfs segment list 2016-04-25 23:30:00 +02:00
mainboard mainboard/kgpe-d16|kcma-d8: Update memory test to include second PRNG stage 2016-04-26 16:54:47 +02:00
northbridge nb/amd/mct_ddr3: Report correct DIMM in MRS setup routines 2016-04-26 16:54:04 +02:00
soc soc/intel/quark: Fix MTRR reads 2016-04-22 17:45:03 +02:00
southbridge intel/i82801ax: Fix IDE setup console log 2016-04-22 17:25:19 +02:00
superio superio/smsc/mec1308: Fix AddressMax value for SMBX mailbox 2016-04-13 23:39:28 +02:00
vendorcode AGESA vendorcode: Fix type mismatch 2016-04-21 07:39:13 +02:00
Kconfig arch: use Kconfig variable for coreboot table size 2016-04-21 20:40:40 +02:00