coreboot/src/soc
Furquan Shaikh 3f0d64329c soc/intel/common/cse: Support RW update when stitching CSE binary
This change updates the STITCH_ME_BIN path to enable support for
including CSE RW update in CBFS. CSE_RW_FILE is set to either
CONFIG_SOC_INTEL_CSE_RW_FILE or CSE_BP2_BIN depending upon the
selection of STITCH_ME_BIN config.

BUG=b:189177580

Change-Id: I0478f6b2a3342ed29c7ca21aa8e26655c58265f4
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-10-19 16:09:49 +00:00
..
amd acpi/acpigen: Constify CST functions' pointers 2021-10-19 14:57:39 +00:00
cavium src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
example src: Introduce ARCH_ALL_STAGES_X86 2021-07-02 08:19:10 +00:00
intel soc/intel/common/cse: Support RW update when stitching CSE binary 2021-10-19 16:09:49 +00:00
mediatek soc/mediatek/mt8192: add tracker dump 2021-10-13 13:58:01 +00:00
nvidia src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
qualcomm sc7280: Add GSI FW download support 2021-10-18 18:28:53 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb