Stefan Reinauer 3e6ba4dacc Drop southbridge intel/esb6300 ... All mainboards using this southbridge have been removed from the tree already. Change-Id: I4398ef1e270bd0f36c5dd1c6ec3bfec6c2c091e6 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12238 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2015-10-30 18:53:19 +01:00
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acpi	acpi/sata: add generic sata ssdt port generator	2015-06-07 01:24:47 +02:00
arch	wakeup: Switch back to 32bit mode first	2015-10-30 18:52:45 +01:00
commonlib	commonlib/region: add xlate_region_device	2015-10-29 18:58:07 +01:00
console	x86: add standalone verstage support	2015-10-14 17:07:52 +00:00
cpu	smm: 64bit fixes	2015-10-30 18:39:37 +01:00
device	Revert "device/pciexp_device: Tune PCIe bridges before scanning children"	2015-10-30 00:36:07 +01:00
drivers	FSP1_1: Always use common code	2015-10-27 15:19:23 +01:00
ec	ec/chrome: Disable LPC Continuous Serial IRQ Select	2015-10-27 15:18:50 +01:00
include	Drop geode_post_code.h	2015-10-30 18:52:13 +01:00
lib	jpeg: add jpeg_fetch_size()	2015-10-28 19:15:17 +01:00
mainboard	AMD mainboards: Fix 64bit BiosCallOuts.c	2015-10-30 18:31:35 +01:00
northbridge	Drop northbridge/i440lx	2015-10-30 18:53:08 +01:00
soc	rockchip/rk3288: If we fail to read the EDID 5 times in a row, it's an error	2015-10-29 21:07:19 +01:00
southbridge	Drop southbridge intel/esb6300	2015-10-30 18:53:19 +01:00
superio	superio/nuvoton/nct5572d: Enable power state after power failure support	2015-10-23 20:04:07 +02:00
vendorcode	Drop unused code from gcc-intrin.h	2015-10-30 18:39:03 +01:00
Kconfig	Separate bootsplash image menuconfig option from others	2015-10-25 07:28:38 +01:00