coreboot/src/soc/intel
Tim Chu 3d6d1075b2 soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed
Override SMBIOS type 4 max speed. This field should be maximum speed
supported by the system. 3900MHz is expected for Cooper Lake.

Tested=Execute "dmidecode -t 4" to check max speed is correct.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I67edf657a2fe66b38e08056d558e1b360c4b8adc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-05 09:41:56 +00:00
..
alderlake soc/intel/alderlake: Refactor PCIE port config 2021-02-05 09:39:58 +00:00
apollolake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
baytrail src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
braswell soc/intel/baytrail,braswell: Drop TOLM from GNVS 2021-02-02 14:50:38 +00:00
broadwell soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one write 2021-02-05 09:39:50 +00:00
cannonlake pci_ids/intel: Add missing CFL-S GT1 IGD IDs 2021-02-03 08:58:39 +00:00
common acpi: Add support for reporting CrashLog in BERT table 2021-02-04 10:21:02 +00:00
denverton_ns soc/intel: Remove duplicate call to acpi_wake_source() 2021-01-29 19:35:25 +00:00
elkhartlake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
icelake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
jasperlake src: Remove unused <cbmem.h> 2021-02-03 08:56:35 +00:00
quark drivers/intel/fsp2_0: Fix running on x86_64 2021-02-04 10:21:42 +00:00
skylake soc/intel/skylake/acpi/irqlinks.asl: Fix typo in comment 2021-02-05 09:40:53 +00:00
tigerlake soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 2021-02-04 09:53:15 +00:00
xeon_sp soc/intel/xeon_sp/cpx: Override SMBIOS type 4 max speed 2021-02-05 09:41:56 +00:00
Kconfig