coreboot/src
Sridhar Siricilla 3d27705d27 soc/intel/{skl, common}: Move ME Firmware SKU Types to common code
1. Move ME firmware SKU types into common code.
2. Define ME_HFS3_FW_SKU_CUSTOM SKU.

TEST=Verified on hatch & soraka.

Change-Id: Iaa4cf8d5b41c1008da1e7aa63b5a6960bb9a727b
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-12 06:13:08 +00:00
..
acpi
arch arch/x86/acpi: Change message in acpi_write_dbg2_pci_uart to BIOS_DEBUG 2020-02-11 07:51:21 +00:00
commonlib commonlib/cbfs.h: Correct spelling error in comment 2020-02-04 16:12:22 +00:00
console console/post: NOPOST means NOPOST 2020-01-18 10:53:08 +00:00
cpu cpu/intel: Drop unused file 2020-02-09 19:34:32 +00:00
device Add configurable ramstage support for minimal PCI scanning 2020-02-08 18:57:36 +00:00
drivers vendorcode/intel: Remove Ice Lake FSP Bindings 2020-02-11 09:09:39 +00:00
ec ec/google/wilco: Set cpu id and cores to EC 2020-02-01 19:53:11 +00:00
include Add configurable ramstage support for minimal PCI scanning 2020-02-08 18:57:36 +00:00
lib commonlib: Add commonlib/bsd 2020-01-28 06:36:13 +00:00
mainboard mb/google/volteer: use new Tiger Lake memory config 2020-02-11 07:52:47 +00:00
northbridge nb/intel/haswell: Fix type definition of dev in PCI_FUNC(dev) 2020-02-06 18:10:43 +00:00
security vboot: correct workbuf size when VBOOT_STARTS_IN_ROMSTAGE 2020-02-10 21:25:14 +00:00
soc soc/intel/{skl, common}: Move ME Firmware SKU Types to common code 2020-02-12 06:13:08 +00:00
southbridge sb/intel/lynxpoint: Don't use_ADR and _HID 2020-02-11 07:46:30 +00:00
superio superio/nuvoton/nct5539d/acpi: fix # comment in superio.asl 2020-02-09 07:45:19 +00:00
vendorcode vendorcode/intel: Remove Ice Lake FSP Bindings 2020-02-11 09:09:39 +00:00
Kconfig Kconfig: Add CONFIG_PCI dependency for CONFIG_MINIMAL_PCI_SCANNING 2020-02-11 02:34:50 +00:00