coreboot/src/soc/intel
Angel Pons 3cc2c38d50 soc/intel/broadwell: Separate PCH in devicetree
Flesh out the PCH configuration into a separate chip. Keep it within the
Broadwell SoC directory for now, to ease moving files around. The boards
were prepared beforehand and the devicetrees require next to no changes.

Tested on out-of-tree Acer Aspire E5-573, still boots.

Change-Id: I28d948f3e6d85e669d12b29516d867c1d1ae9e1a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46700
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-30 00:45:36 +00:00
..
alderlake mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg' 2020-10-29 10:49:03 +00:00
apollolake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
baytrail src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
braswell src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
broadwell soc/intel/broadwell: Separate PCH in devicetree 2020-10-30 00:45:36 +00:00
cannonlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
common soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
denverton_ns src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
elkhartlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
icelake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
jasperlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
quark arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
skylake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
tigerlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
xeon_sp soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00
Kconfig fsp2_0: Gather Kconfig declarations 2020-04-05 23:26:24 +00:00