coreboot/src
efdesign98 3cab93ce8e Add SSE3 dependent code
This change separates out changes that were initially found
in the commit for XHCI and AHCI changes to "arch/x86/Makefile.
inc".  It also corrects a comment.  The SSE3 dependent code
adds a pair of CR4 access functions and a blob of code that
re-sets CR4.OSFXSR and CR4.OSXMMEXCPT.

Change-Id: Id97256978da81589d97dcae97981a049101b5258
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/113
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2011-07-22 08:22:59 +02:00
..
arch/x86 Do full flush on uart8250 only at end of printk. 2011-07-12 11:36:20 +02:00
boot more ifdef -> if fixes. 2011-04-21 21:26:58 +00:00
console Do full flush on uart8250 only at end of printk. 2011-07-12 11:36:20 +02:00
cpu Add SSE3 dependent code 2011-07-22 08:22:59 +02:00
devices more ifdef -> if fixes 2011-04-21 20:45:45 +00:00
drivers Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an 2011-04-26 23:47:04 +00:00
ec T60: undock on external power loss 2011-06-23 14:12:26 +02:00
include Make AMD SMM SMP aware 2011-07-13 02:01:35 +02:00
lib Do full flush on uart8250 only at end of printk. 2011-07-12 11:36:20 +02:00
mainboard Update AMD SR5650 and SB700 2011-07-22 00:20:59 +02:00
northbridge Update AMD SR5650 and SB700 2011-07-22 00:20:59 +02:00
pc80 X60: trigger save cmos on volume/brightness change 2011-06-15 08:51:18 +02:00
southbridge Update AMD SR5650 and SB700 2011-07-22 00:20:59 +02:00
superio Update AMD SR5650 and SB700 2011-07-22 00:20:59 +02:00
vendorcode Update AMD SR5650 and SB700 2011-07-22 00:20:59 +02:00
Kconfig added a config option for ACPI debugging 2011-07-02 00:49:53 +02:00
Kconfig.deprecated_options some ifdef --> if fixes 2011-04-21 20:24:43 +00:00