Martin Roth 3c2e287b7c console/Kconfig - only print UART addresses for I/O based UARTs ... It doesn't make sense to print these values for memory-mapped UARTs. Change-Id: Ie2d9cf95f0b0fdcf601e74de799b1390c08f2335 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34247 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>		2019-07-13 17:53:22 +00:00
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acpi
arch	cpu/x86: Move smm_lock() prototype	2019-07-13 13:17:21 +00:00
commonlib	commonlib/storage: use ALIGN_UP instead of ALIGN for better readability	2019-06-21 12:49:43 +00:00
console	console/Kconfig - only print UART addresses for I/O based UARTs	2019-07-13 17:53:22 +00:00
cpu	cpu/x86: Move smm_lock() prototype	2019-07-13 13:17:21 +00:00
device	device/oprom: Replace uses of dev_find_slot()	2019-07-12 09:27:56 +00:00
drivers	soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLER	2019-07-13 13:22:15 +00:00
ec	arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class	2019-07-09 12:43:35 +00:00
include	arch, include, soc: Use common stdint.h	2019-07-12 17:40:24 +00:00
lib	fit_payload: Always set DT size	2019-07-13 16:15:16 +00:00
mainboard	mb/siemens/mc_apl3: Enable LPSS UART 1	2019-07-12 17:09:21 +00:00
northbridge	intel/e7505,i82801dx: Fix SMM_ASEG lock	2019-07-13 13:16:26 +00:00
security	src/security/vboot: Add option to skip display init with vboot 2.0	2019-07-07 20:09:24 +00:00
soc	soc/intel/cannonlake: Remove unused header files from southbridge.asl	2019-07-13 13:59:36 +00:00
southbridge	soc,southbridge/intel: Avoid preprocessor with HAVE_SMI_HANDLER	2019-07-13 13:22:15 +00:00
superio	nuvoton/early_serial: improve comments on serial pinmux settings	2019-06-22 11:39:12 +00:00
vendorcode	vendorcode/amd/agesa/f15tn: Fix condition that has identical branches	2019-07-12 17:05:30 +00:00
Kconfig	Kconfig: Remove HAVE_RAMSTAGE dependency from RELOCATABLE_RAMSTAGE	2019-07-12 02:22:27 +00:00