coreboot/src/soc/intel
Nico Huber 3c0d23b6ab intel/fsp1_1: Drop remnants of pei_data
`pei_data` was a struct with blob parameters from pre-FSP times.
Somehow, it sneaked into upstream FSP1.1 support (probably because
early board ports were written for a different blob). When added
upstream, its usage was already perverted. It was declared at SoC
level but mostly used to pass mainboard data from mainboard code
to itself and FSP data from FSP code to itself. Now that no board/
SoC code uses it anymore, we can finally drop it.

Change-Id: Ib0bc402703188539cf2254bdc395cca9dd32d863
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-05-07 15:59:10 +00:00
..
apollolake soc/intel/apollolake: Reset GPI IS & IE registers at ramstage 2019-05-06 10:34:52 +00:00
baytrail vboot: refactor OPROM code 2019-04-30 21:47:25 +00:00
braswell intel/fsp1_1: Drop remnants of pei_data 2019-05-07 15:59:10 +00:00
broadwell Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
cannonlake soc/intel/cannonlake/acpi: Add board level s0ix call back 2019-05-06 10:34:35 +00:00
common soc/skylake: Add missing PCH IDs 2019-05-06 10:29:02 +00:00
denverton_ns soc/intel: Add GPI interrupt config register offset info 2019-04-29 12:18:27 +00:00
fsp_baytrail src: Use include <console/console.h> when appropriate 2019-04-23 10:01:21 +00:00
fsp_broadwell_de soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
icelake soc/intel/icelake: Correct the GPE DWx mapping for GPIO groups 2019-05-02 06:03:21 +00:00
quark soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
skylake intel/fsp1_1: Drop remnants of pei_data 2019-05-07 15:59:10 +00:00
Kconfig src/cpu: Remove dead sourced lines 2018-11-15 10:25:20 +00:00