Elyes HAOUAS 3bf4e28fb8 nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection ... CHANNEL_XOR_RANDOMIZATION is configurable for no reason. Change-Id: I31e6ed6cb040dcba756cbfd2247d90753d372915 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2019-06-14 18:07:30 +00:00
..
acpi
arch	stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable	2019-06-13 04:39:28 +00:00
commonlib	cbmem: Add ID for UCSI	2019-06-07 20:50:39 +00:00
console	console: Allow using vprintk() with disabled console	2019-06-11 17:29:02 +00:00
cpu	Rampayload: Able to build coreboot without ramstage	2019-06-11 15:49:25 +00:00
device	src/device: Prevent attack on null pointer dereference	2019-06-03 13:25:25 +00:00
drivers	drivers/fsp1_0: select CACHE_MRC_SETTINGS if MRC_CACHE_FMAP	2019-06-14 16:05:02 +00:00
ec	ec/google/wilco: Read back from EC RAM after S0ix entry	2019-06-13 21:14:08 +00:00
include	Set ENV_PAYLOAD_LOADER to ENV_POSTCAR when CONFIG_RAMPAYLOAD is enabled	2019-06-13 04:40:05 +00:00
lib	stage_cache: Make empty inline function if CONFIG_NO_STAGE_CACHE enable	2019-06-13 04:39:28 +00:00
mainboard	nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection	2019-06-14 18:07:30 +00:00
northbridge	nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection	2019-06-14 18:07:30 +00:00
security	vboot: recovery path should finalize work context	2019-06-12 05:45:10 +00:00
soc	soc/intel/{cml, whl}: Add option to skip HECI disable in SMM	2019-06-13 04:38:39 +00:00
southbridge	sb/amd/sb700: Fix misleading formatting	2019-06-07 21:30:57 +00:00
superio	superio/fintek/f71863fg: Remove variable set but not used	2019-05-25 18:20:15 +00:00
vendorcode	vendorcode/intel/fsp/fsp2_0/cometlake: Update FSP-M/S header files as per v1155	2019-06-12 22:48:36 +00:00
Kconfig	Rampayload: Able to build coreboot without ramstage	2019-06-11 15:49:25 +00:00