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coreboot/src/soc/intel
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Maxim Polyakov 3ba380797b soc/intel/skylake: remove PrimaryDisplay check 
Checking the PrimaryDisplay parameter (added by patch with Change
Id Ie3f9362676105e41c69139a094dbb9e8b865689f) isn`t required. The
display connected to PEG works  even if IGD is primary for output
image and at the same time this device is disabled

Tested on Asrock H110M-DVS with NVIDIA GTX 1060 GPU
Payload: tianocore edk2-stable201811-216-g51be9d0

Change-Id: I5615597881a151bb004676d914fbf40874ac1f68
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32615
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-07 16:03:01 +00:00
..
apollolake soc/intel/apollolake: Reset GPI IS & IE registers at ramstage 2019-05-06 10:34:52 +00:00
baytrail vboot: refactor OPROM code 2019-04-30 21:47:25 +00:00
braswell intel/fsp1_1: Drop remnants of pei_data 2019-05-07 15:59:10 +00:00
broadwell Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
cannonlake soc/intel/cannonlake/acpi: Add board level s0ix call back 2019-05-06 10:34:35 +00:00
common soc/skylake: Add missing PCH IDs 2019-05-06 10:29:02 +00:00
denverton_ns soc/intel: Add GPI interrupt config register offset info 2019-04-29 12:18:27 +00:00
fsp_baytrail src: Use include <console/console.h> when appropriate 2019-04-23 10:01:21 +00:00
fsp_broadwell_de soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
icelake soc/intel/icelake: Correct the GPE DWx mapping for GPIO groups 2019-05-02 06:03:21 +00:00
quark soc/{amd,intel}/chip: Use local include for chip.h 2019-04-26 16:49:13 +00:00
skylake soc/intel/skylake: remove PrimaryDisplay check 2019-05-07 16:03:01 +00:00
Kconfig src/cpu: Remove dead sourced lines 2018-11-15 10:25:20 +00:00