coreboot/src/soc
Michał Żygowski a5abcf2be3 soc/intel/elkhartlake: Increase BSP stack size by 1 KiB to 193 KiB
The Kconfig help section says FSP uses 192 KiB of stack (0x30000) and
coreboot's romstage requires ~1 KiB, but it is not satisfied currently.
Increase the BSP stack size by the missing 1KiB for romstage like
other SoCs do.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Iddd4a4613bc174aec4331732371a27450225258c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73820
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-03-22 09:55:24 +00:00
..
amd soc/amd/mendocino: Remove 2 unused PCIe functions 2023-03-21 19:44:38 +00:00
cavium treewide: Remove duplicated include <device/pci.h> 2023-02-01 03:03:34 +00:00
example/min86
intel soc/intel/elkhartlake: Increase BSP stack size by 1 KiB to 193 KiB 2023-03-22 09:55:24 +00:00
mediatek soc/mediatek/mt8186: Shut down PMIC on power key long press 2023-03-15 10:30:17 +00:00
nvidia treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
qualcomm qualcomm/common: Pass FMAX_LIMIT flag for Lazor board to QcLib 2023-03-17 00:34:08 +00:00
rockchip
samsung treewide: Fix old-style declarations 2023-01-17 04:23:49 +00:00
sifive/fu540
ti
ucb/riscv