coreboot/src/soc
Meera Ravindranath 3b03798953 soc/intel/alderlake: Disable VT-d for early silicons
VT-d needs to disabled for early silicons as it results in a
CPU hard hang.

BUG=b:197177091
Test=Boot brya to OS with no hang

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2021-11-15 10:34:44 +00:00
..
amd amdfwtool: Set soc name for Stoneyridge 2021-11-15 10:06:39 +00:00
cavium Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
example Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
intel soc/intel/alderlake: Disable VT-d for early silicons 2021-11-15 10:34:44 +00:00
mediatek mb/google/corsola: Add VMCH and VMC for regulator interface 2021-11-15 03:08:00 +00:00
nvidia soc/nvidia,qualcomm: Fix indirect includes 2021-11-09 00:13:25 +00:00
qualcomm soc/nvidia,qualcomm: Fix indirect includes 2021-11-09 00:13:25 +00:00
rockchip mipi: Make panel init callback work directly on DSI transaction types 2021-09-11 01:42:47 +00:00
samsung src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
sifive src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ti
ucb