coreboot/src/superio
Marc Jones 3aca4b5734 The AMD dbm690t mainboard uses the it8712f SIO with the
default 48MHz clock input. The Asus a8n_e uses the it8712f
with a 24MHz clock input. The it8712f early init code was
setting a 24MHz input clock(to support the a8n_e).
Since 48Mhz is the default I added a function to set 24MHz
input clock to the a8n_e.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Rudolf Marek <r.marek@assembler.cz>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-23 22:19:27 +00:00
..
fintek/f71805f Add post-RAM init code for the Fintek F71805F Super I/O. 2008-05-20 18:10:24 +00:00
intel/i3100 This patch implements support for the Intel 3100 integrated SuperIO and UART. 2008-03-16 23:31:04 +00:00
ite The AMD dbm690t mainboard uses the it8712f SIO with the 2008-09-23 22:19:27 +00:00
nsc Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
smsc This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the 2008-04-19 13:32:19 +00:00
via/vt1211 Use the canonical name of the vendors/devices and the 2006-11-05 18:50:49 +00:00
winbond Add support for the Winbond W83697HF Super I/O. 2008-07-21 14:49:04 +00:00