erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src/include/cpu/intel
History
Kyösti Mälkki 8ae05a2612 UPSTREAM: intel: Drop old romstage main() without asmlinkage 
Change-Id: I0d471766fdf46f6e61ac692fc98730a2429f981f
Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15234
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355005
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
2016-06-22 10:41:45 -07:00
..
hyperthreading.h Intel CPUs: execute microcode update only once per core 2012-07-02 15:49:07 +02:00
l2_cache.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
microcode.h cpu/intel/microcode: allow microcode to be loaded in romstage 2016-02-10 18:08:28 +01:00
romstage.h UPSTREAM: intel: Drop old romstage main() without asmlinkage 2016-06-22 10:41:45 -07:00
speedstep.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
turbo.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00