coreboot/src
Gabe Black 3aa58162e1 am335x: Clean up/fix some settings in the am335x Kconfig.
Some settings in the am335x Kconfig weren't actually used for anything, some
where place holders, and some where left over from another CPU. The memory
addresses are in the internal RAM in the SOC as described in the reference
manual. The stack is put where the internal ROM had its stack, and the
bootblock is put at the bottom of that region as the manual suggests. The
ROM stage offset is set to 10K which is a bit bigger than the ~7.5K the
bootblock currently takes up.

Change-Id: I1a117d789a791d7e3db1118823f8216b3361433c
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3327
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-06-03 03:10:17 +02:00
..
arch Provide sane Kconfig default for cmos.default. 2013-06-02 23:07:22 +02:00
console Get rid of MAXIMUM_CONSOLE_LOGLEVEL; compile all messages into the coreboot binary 2013-05-10 17:33:49 +02:00
cpu am335x: Clean up/fix some settings in the am335x Kconfig. 2013-06-03 03:10:17 +02:00
device Get rid of a number of __GNUC__ checks 2013-05-10 17:31:31 +02:00
drivers pc80/tpm: allow for cache-as-ram migration 2013-05-16 01:29:59 +02:00
ec ChromeEC: Drop unneeded Kconfig variable EC_GOOGLE_API_ROOT 2013-04-18 02:47:23 +02:00
include Intel GM45, 945, SNB: Move multiply_to_tsc() to tsc.h 2013-05-25 14:22:06 +02:00
lib cbmem console: use cache-as-ram API and cleanup 2013-05-16 01:30:17 +02:00
mainboard Lenovo ThinkPad X60: cleanup Native VGA init. 2013-05-31 18:57:42 +02:00
northbridge Intel GM45, 945, SNB: Move multiply_to_tsc() to tsc.h 2013-05-25 14:22:06 +02:00
southbridge AMD AGESA Hudson: Include stdint.h and io.h to fix build 2013-05-20 18:34:18 +02:00
superio Drop prototype guarding for romcc 2013-05-10 00:06:46 +02:00
vendorcode chromeos: use cache-as-ram migration API for vbnv 2013-05-16 01:30:09 +02:00
Kconfig Kconfig: Remove duplicate entry for USE_OPTION_TABLE 2013-05-23 10:42:41 +02:00