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coreboot/src/soc
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Varadarajan Narayanan 3939acaa77 soc/qualcomm/ipq40xx: Enable USB 
BUG=chrome-os-partner:49249
TEST=Compiles and Boots and detect USB storage
BRANCH=none

Change-Id: I9f33adccaabf436c8a8ba08033ff1221ace71aaa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f6b18062b7570b6aa71a72ad6185edaf00b48e2d
Original-Change-Id: I86a297fc915d4886958f8490dda2c1fa00a6c9d3
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333312
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14675
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10 23:23:13 +02:00
..
broadcom/cygnus soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
dmp/vortex86ex dmp/vortex86ex: Merge northbridge and southbridge into soc 2016-05-05 20:06:33 +02:00
imgtec/pistachio drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
intel intel/common/mma: override SAGV to fixed high for MMA tests 2016-05-10 22:59:58 +02:00
marvell drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
mediatek/mt8173 soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V 2016-05-09 08:36:57 +02:00
nvidia drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
qualcomm soc/qualcomm/ipq40xx: Enable USB 2016-05-10 23:23:13 +02:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
samsung soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00