coreboot/src
Ionela Voinescu 38063b050d pistachio: add clock setup for all I2C interfaces
BUG=chrome-os-partner:31438
TEST=tested on Pistachio bring up board; all I2C interfaces
     were tested with the TPM and they all work properly.
BRANCH=none

Change-Id: I02202585140beb818212c02800f6b7e4966a922a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 33b2adecc4939ac73fffba47adf1c8306a888b8d
Original-Change-Id: Ida7eaa72d4d6e6b034319086410de5baa63788bc
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/256361
Original-Reviewed-by: Chris Lane <chris.lane@frontier-silicon.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9839
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-21 08:23:37 +02:00
..
arch Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
console Add console wrapper for UART driver 2015-04-14 21:25:34 +02:00
cpu arm(64): Globally replace writel(v, a) with write32(a, v) 2015-04-21 08:22:28 +02:00
device Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
drivers Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
ec chromeec: Fix printf formatting warning 2015-04-14 09:01:03 +02:00
include Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
lib Unify byte order macros and clrsetbits 2015-04-21 08:23:25 +02:00
mainboard pistachio: add clock setup for all I2C interfaces 2015-04-21 08:23:37 +02:00
northbridge northbridge/amd/agesa/familyXY: Make NULL device op explicit 2015-04-09 19:34:22 +02:00
soc pistachio: add clock setup for all I2C interfaces 2015-04-21 08:23:37 +02:00
southbridge southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipset 2015-04-20 23:51:34 +02:00
superio kconfig: drop intermittend forwarder files 2015-04-07 17:40:28 +02:00
vendorcode arm(64): Globally replace writel(v, a) with write32(a, v) 2015-04-21 08:22:28 +02:00
Kconfig rk3288: Disable ramstage compression by default 2015-04-20 10:19:56 +02:00